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  dg441 dg441 dual-in-line and soic in 1 in 2 d 1 d 2 s 1 s 2 v? v+ gnd nc s 4 s 3 d 4 d 3 in 4 in 3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 top view 9 s 1 nc s 2 in 3 v? d 3 v+ d 4 nc in 4 nc nc gnd in 2 nc d 2 s 4 d 1 s 3 in 1 key top view lcc 910111213 4 5 6 7 8 1 2 319 20 14 15 16 17 18  logic dg441 DG442 0 1 on off off on logic ?0?  0.8 v logic ?1?  2.4 v dg441/442 vishay siliconix document number: 70053 s-20147?rev. h, 11-mar-02 www.vishay.com 1 quad spst cmos analog switches
 
     low on-resistance: 50  low leakage: 80 pa  low power consumption: 0.2 mw  fast switching action?t on : 150 ns  low charge injection?q: ?1 pc  dg201a/dg202 upgrades  ttl/cmos-compatible logic  single supply capability  less signal errors and distortion  reduced power supply requirements  faster throughput  improved reliability  reduced pedestal errors  simplifies retrofit  simple interfacing  audio switching  battery powered systems  data acquisition  hi-rel systems  sample-and-hold circuits  communication systems  automatic test equipment  medical instruments     the dg441/442 monolithic quad analog switches are designed to provide high speed, low error switching of analog and audio signals. the dg441 has a normally closed function. the DG442 has a normally open function. combining low on-resistance (50 , typ.) with high speed (t on 150 ns, typ.), the dg441/442 are ideally suited for upgrading dg201a/202 sockets. charge injection has been minimized on the drain for use in sample-and-hold circuits. to achieve high voltage ratings and superior switching performance, the dg441/442 are built on vishay siliconix?s high-voltage silicon-gate process. an epitaxial layer prevents latchup. each switch conducts equally well in both directions when on, and blocks input voltages to the supply levels when off.
      
 
dg441/442 vishay siliconix www.vishay.com 2 document number: 70053 s-20147 ? rev. h, 11-mar-02   
  temp range package part number dg441dj  16-pin plastic dip DG442dj ? 40 to 85  c dg441dy 16-pin narrow soic DG442dy dg441ak dg441ak/883 5962-9204101mea  16-pin cerdip DG442ak ? 55 to 125  c DG442ak/883 5962-9204102mea 5962-9204101m2a lcc-20 5962-9204102m2a      v+ to v ? 44 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd to v ? 25 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital inputs a v s , v d (v ? ) ? 2 v to (v+) +2 v . . . . . . . . . . . . . . . . . . . . . . . . . . or 30 ma, whichever occurs first continuous current (any terminal) 30 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . current, s or d (pulsed 1 ms, 10% duty cycle) 100 ma . . . . . . . . . . . . . . . . . . storage temperature (ak suffix) ? 65 to 150  c . . . . . . . . . . . . . . . . . . (dj, dy suffix) ? 65 to 125  c . . . . . . . . . . . . . . power dissipation (package)b 16-pin plastic dip c 450 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-pin cerdip d 900 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-pin narrow body soic d 900 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lcc-20 d 1200 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. signals on s x , d x , or in x exceeding v+ or v ? will be clamped by internal diodes. limit forward diode current to maximum current ratings. b. all leads welded or soldered to pc board. c. derate 6 mw/  c above 75  c d. derate 12 mw/  c above 25  c       figure 1. in x 5 v reg level shift/ drive v+ gnd v ? v ? v+
dg441/442 vishay siliconix document number: 70053 s-20147 ? rev. h, 11-mar-02 www.vishay.com 3  
   
  test conditions unless otherwise specified a suffix ? 55 to 125  c d suffix ? 40 to 85  c parameter symbol v+ = 15 v, v ? = ? 15 v, v in = 2.4 v, 0.8 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full ? 15 15 ? 15 15 v drain-source on-resistance r ds(on) i s = ? 10 ma, v d =  8.5 v v+ = 13.5 v, v ? = ? 13.5 v room full 50 85 100 85 100 r ds(on) i s = ? 10 ma, v d =  10 v v+ = 15 v, v ? = ? 15 v room full 4 5 4 5 switch off i s(off) v+ = 16.5, v ? = ? 16.5 v room full  0.01 ? 0.5 ? 20 0.5 20 ? 0.5 ? 5 0.5 5 switch off leakage current i d(off) v+ = 16.5, v ? = ? 16.5 v v d =  15.5 v, v s =  15.5 v room full  0.01 ? 0.5 ? 20 0.5 20 ? 0.5 ? 5 0.5 5 na channel on leakage current i d(on) v+ = 16.5 v, v ? = ? 16.5 v v s = v d =  15.5 v room full  0.08 ? 0.5 ? 40 0.5 40 ? 0.5 ? 10 0.5 10 digital control input current v in low i il v in under test = 0.8 v, all other = 2.4 v full ? 0.01 ? 500 500 ? 500 500 input current v in high i ih v in under test = 2.4 v, all other = 0.8 v full 0.01 ? 500 500 ? 500 500 na dynamic characteristics turn-on time t on , c l = 35 pf v =  10 v, see figure 2 room 90 120 120 ns turn-off time DG442 t off v s =  10 v, see figure 2 room 110 210 210 charge injection e q c l = 1 nf, v s = 0 v v gen = 0 v, r gen = 0 room ? 1 pc off isolation e oirr , c l = 5 pf f = 1 mhz room 100 db source off capacitance e c s(off) room 4 drain off capacitance e c d(off) f = 1 mhz room 4 pf channel on capacitance e c d(on) v analog = 0 v room 16 power supplies positive supply current i+ full 15 100 100 negative supply current i ? v+ = 16.5 v, v ? = ? 16.5 v v in = 0 or 5 v room full ? 0.000 1 ? 1 ? 5 ? 1 ? 5 a ground current i gnd full ? 15 ? 100 ? 100
dg441/442 vishay siliconix www.vishay.com 4 document number: 70053 s-20147 ? rev. h, 11-mar-02  
   
    test conditions otherwise unless specified a suffix ? 55 to 125  c d suffix ? 40 to 85  c parameter symbol v+ = 12 v, v ? = 0 v, v in = 2.4 v, 0.8 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full 0 12 0 12 v drain-source on-resistance r ds(on) i s = ? 10 ma, v d = 3 v, 8 v v+ = 10.8 v room full 100 160 200 160 200 dynamic characteristics turn-on time t on r l = 1 k , c l = 35 pf room 300 450 450 turn-off time t off r l = 1 k , c l = 35 pf v s = 8 v, see figure 2 room 60 200 200 ns charge injection q c l = 1 nf v gen = 6 v, r gen = 0 room 2 pc power supplies positive supply current i+ full 15 100 100 negative supply current i ? v+ = 13.2 v, v ? = 0 v v in = 0 or 5 v room full ? 0.0001 ? 1 ? 100 ? 1 ? 100 a ground current i gnd in full ? 15 ? 100 ? 100 notes: a. refer to process option flowchart. b. room = 25  c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function.
dg441/442 vishay siliconix document number: 70053 s-20147 ? rev. h, 11-mar-02 www.vishay.com 5             20 0 ? 20 0 20 60 40 80 100  15 v  20 v  5 v  8 v  10 v ? 15 ? 10 ? 5 5 10 15 r ds(on) vs. v d and power supply voltage r ds(on) vs. v d and temperature 15 0 ? 15 0 20 50 30 70 80 40 60 10 125  c 25  c 85  c ? 40  c v+ = 15 v v ? = ? 15 v ? 10 ? 5510 r ds(on) ? drain-source on-resistance ( v d ? drain voltage (v) v d ? drain voltage (v) r ds(on) ? drain-source on-resistance (  12 v ? 55  c 0  c ) ) r ds(on) vs. v d and temperature (single 12-v supply) r ds(on) vs. v d and unipolar power supply voltage 12 6 0 0 20 40 80 100 60 120 140 20 0 0 50 150 200 100 250 300 v+ = 5 v 8 v 10 v 12 v 15 v 20 v v+ = 12 v v ? = 0 v v ? = 0 v 125  c 25  c ? 55  c 85  c 24 810 4 8 12 16 r ds(on) ? drain-source on-resistance ( v d ? drain voltage (v) v d ? drain voltage (v) r ds(on) ? drain-source on-resistance ( ? 40  c 0  c ) ) crosstalk and off isolation vs. frequency charge injection vs. source voltage ( ? db) q (pc) 0 20 40 80 100 60 120 140 10 0 ? 10 ? 30 ? 10 20 0 40 50 10 30 ? 20 ? 55 1 k 10 k 100 k 1 m 10 m 100 v+ = 15 v v ? = ? 15 v ref. 10 dbm off isolation crosstalk v+ = 15 v v ? = ? 15 v v+ = 12 v v ? = 0 v c l = 1 nf v s ? source voltage (v) f ? frequency (hz)
dg441/442 vishay siliconix www.vishay.com 6 document number: 70053 s-20147 ? rev. h, 11-mar-02             source/drain leakage currents switching threshold vs. supply voltage 15 0 ? 15 ? 100 ? 80 ? 40 ? 20 ? 60 0 20 ? 10 ? 5510 v+ = 15 v v ? = ? 15 v for i (off) , v d = ? v s i s(off) , i d(off) i d(on) 0 1.6 0.8 2.4 0  5  10  15  20 v+, v ? positive and negative supplies (v) v d or v s ? drain or source voltage (v) (v) in v (pa) i , i sd ?????? ?????? ?????? ?????? ?????? ?????? ?????? source/drain leakage currents (single 12-v supply) operating voltage v+ (v) 12 6 0 ? 40 ? 30 ? 10 ? 20 0 10 ? 50 ? 20 0 0 10 30 40 50 20 ? 40 ? 30 ? 10 44 3 v ? v+ v+ = 12 v v ? = 0 v for i d , v s = 0 for i s , v d = 0 i s(off) , i d(off) i s(on) + i d(on) d in s 24 810 v d or v s ? drain or source voltage (v) v ? ? negative supply (v) (pa) i , i sd cmos compatible switching time vs. power supply voltage supply voltage (v) t (ns)  10  12  14  16  18  20  22 160 140 120 20 80 60 40 100 t off t on switching time vs. power supply voltage t (ns) 500 400 0 822 200 100 300 10 12 14 16 18 20 t off t on v ? = 0 v v s ? source voltage (v) 5 v ? cmos compatible ttl compatible v in = 0.8 v, 2.4 v
dg441/442 vishay siliconix document number: 70053 s-20147 ? rev. h, 11-mar-02 www.vishay.com 7     figure 2. switching time 0 v logic input switch input switch output 3 v 50% 0 v v o v s t r <20 ns t f <20 ns t off t on note: logic input waveform is inverted for DG442. 50% 80% 80%  10 v c l (includes fixture and stray capacitance) v ? v+ in s d 3 v r l 1 k c l 35 pf v o ? 15 v gnd +15 v figure 3. charge injection off on off off on off v o v o in x in x q = v o x c l (dg441) (DG442) c l 1 nf in d v o v ? v+ s 3 v r g ? 15 v gnd +15 v figure 4. crosstalk figure 5. off isolation figure 6. source/drain capacitances c = 1 mf tantalum in parallel with 0.01 mf ceramic 50 d 1 v o r g = 50 s 1 +15 v ? 15 v d 2 gnd v+ v ? nc c c s 2 r l in 1 x talk isolation = 20 log v s v o 0v, 2.4 v 0v, 2.4 v v s in 2 c = rf bypass s in r l d r g = 50 v s v o 0v, 2.4 v off isolation = 20 log v s v o v+ ? 15 v gnd v ? c c +15 v s d in +15 v ? 15 v gnd v+ v ? c c 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent
dg441/442 vishay siliconix www.vishay.com 8 document number: 70053 s-20147 ? rev. h, 11-mar-02    figure 7. power mosfet driver +15 v +15 v gnd v ? v+ 0 = load off 1 = load on +24 v i = 3a vn0300l, m DG442 +15 v 10 k 150 r l figure 8. open loop sample-and-hold h = sample l = hold ? 15 v +15 v v in v out c h sd in 1/4 DG442 + ? + ? in +15 v ? 15 v v+ v ? gnd dg441 or DG442 + ? v in v out gain error is determined only by the resistor tolerance. op amp offset and cmrr will limit ac- curacy of circuit. gain 1 a v = 1 gain 2 a v = 10 gain 3 a v = 20 gain 4 a v = 100 r 1 90 k r 2 5 k r 3 4 k r 4 1 k v out v in = r 1 + r 2 + r 3 + r 4 r 4 = 100 with sw 4 closed figure 9. precision-weighted resistor programmable-gain amplifier
legal disclaimer notice vishay document number: 91000 www.vishay.com revision: 08-apr-05 1 notice specifications of the products displayed herein are subjec t to change without notice. vishay intertechnology, inc., or anyone on its behalf, assume s no responsibility or liability fo r any errors or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in vishay's terms and conditions of sale for such products, vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and /or use of vishay products including liab ility or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyrigh t, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify vishay for any damages resulting from such improper use or sale.


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